Performance Analysis of Fully-Depleted Silicon-On-Insulator (SOI) G 4 -FET and Gate-All-Around (GAA) MOSFETs
نویسندگان
چکیده
منابع مشابه
Fully Depleted SOI MOSFETs for DRAM
SOI technology has received high attention for the future high density DRAM applications. The two major requirements in any DRAM technology are long retention time and high charging efficiency. This paper discusses the disadvantages of using bulk silicon and Partially Depleted SOI devices in these terms. It is shown that a DRAM cell built with fully depleted SOI MOSFETs can store data for a lon...
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Recently, gate-all-around (GAA) nanowire field effect transistors (NWFETs) have attracted increasing attention due to their superior gate control and short channel effect immunity [1-4]. However, confined by the limitation of manufacturing process, the different aspect ratio (AR) results in different shapes of channel cross section, such as ellipse-shaped or rectangular-shaped instead of the id...
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Fully-depleted SOI devices are being considered for low power applications due to their threshold voltage, sub-threshold slope and capacitance advantages over other technologies. However, the threshold voltage of a fully-depleted SOI device is a strong function of the silicon film and sacrificial oxide thicknesses. Thus, to fully realize the advantages of fully-depleted SOI devices in commercia...
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ژورنال
عنوان ژورنال: IJIREEICE
سال: 2019
ISSN: 2321-5526,2321-2004
DOI: 10.17148/ijireeice.2019.7301